Digital Guarding

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	Application Note 105 *PCB Test – Test bus-connected devices in circuit - isolate them with guard voltages*

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In a bus system, the set of connecting lines connects all devices on the bus in parallel. This can make it difficult during pcb testing to pinpoint which chip is actually faulty. Application of high or low "guard" voltages can help isolate the device under test. Bus-connected devices In microprocessor-based systems devices transfer data or control signals over common buses — groups of address, data or control lines. Bus circuits must therefore be designed so that, at any time, only one device is allowed to place data on the bus. Devices in cb bus systems can prove difficult to test as devices on a bus (e.g. RAM, ROM, ports, etc.) can appear in parallel when tested with an ICT fault locator. If the fault locator indicates a fault condition it can be difficult to know which device is producing the fault symptoms. We need some means of isolating a bus-connected device during ICT testing without removing it from its circuit. Tristate devices* Devices on a bus system which are able to place data on to the bus include a "third" state in addition to the normal high and low logic levels. In its third state the outputs are high impedance (essentially open circuit). These tristate devices utilise one or more enable inputs which control the outputs of the device - whether the device behaves as a normal logic device or appears as an open circuit to the bus. Enabling and disabling devices The device enable input is usually connected (often indirectly through the address decoding logic) to one of the control lines of the system micro-processor. The enabling signal is usually active low; applying a logical high to this line places the outputs into the high impedance state, effectively rendering the outputs open circuit
	Using guard voltages ICT fault locators recognise this facility and provide logical high and low guard voltage outputs. Careful placement of guard voltages in a circuit under test can ensure that only the suspect device is enabled.
Consider the circuit above — suppose you suspect RAM device U3. U1, U2 and U3 are bus-connected devices sharing address and data buses. In normal operation decoder U4 sets one (and only one) of its outputs low, enabling U1, U2 or U3. When testing the device with the ICT fault locator, you'll place a test clip, in this case, on U3. When the fault locator tests the device the board is powered up and stimulating signals are applied to the device for a few milliseconds. Because the devices are connected in parallel U1 and U2 are also driven by the fault locator. We can prevent the other devices responding by placing a logic high on each of their CE lines -the devices appear as open circuit to the bus. This process is referred to as guarding. The fault locator includes both logical high and low guard voltages - guard voltages remain at logical high or low for the duration of the test. Other devices on the bus could be similarly disabled - you can apply guard voltages to as many devices as necessary to isolate the device under test. Remember, to test a device you disable all the other parallel devices
	Disabling clocks Guard voltages can also be used to inhibit clocks and oscillators from producing signals which could appear at the inputs of a device under test. The circuit below is typical of many CPU clock circuits - applying low guard voltages across the crystal as shown will stop the CPU clock.
Clock signals are often passed through flip-flops, which serve either as clock frequency dividers or provide signal shaping or buffering. You can often prevent the clock signal passing through the flip-flop by applying a guard voltage to the gating inputs or SET or RESET lines. If possible, all clocks and oscillators in a circuit should be disabled during a test. Careful guarding can get you down to component level. Disabling bus buffers In a typical microprocessor-based system the processor is isolated from the rest of the system via bus buffers (e.g. bus transceiver 74245). Disabling the buffer devices can often prove an effective means of isolating devices on the bus. Using Loop until Pass If it proves impossible to locate usable guard points (e.g. if you have no documentation for the circuit) just clip the device and use Loop until Pass - if the device registers a PASS it's a good device.


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