Product information
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CITS880s & TRC Plus – accurate
measurements on fine line traces
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Si8000m / Si9000e Field Solver – differential pair crosstalk
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Si9000e graphing, roughness goal seek, sensitivity analysis projects, trace resistance vs temperature
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Si8000m / Si9000e Monte Carlo impedance simulation
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Webinar Nov 2020 – Introduction to Insertion Loss
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Atlas Delta-L PCB Insertion Loss Test System
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CGen PCB Impedance and Insertion loss Coupon Generator
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Atlas for Anritsu ShockLine™ Delta L 4.0 Eigenvalue Insertion Loss Test
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CITS880s – Controlled Impedance
Test System
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Speedstack PCB stackup design and documentation
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Find ground plane shorts with the
Toneohm 950 multi-layer short
circuit locator
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Si9000e graphing, roughness goal seek, sensitivity analysis projects, trace resistance vs temperature
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How to...
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Anatomy of a PCB impedance test
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Create impedance coupons efficiently with Speedstack & CGEN
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Create impedance coupons with Si8000m / Si9000e & CGEN
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CITS880s – getting started with controlled impedance testing
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Inserting controlled impedance tests with the CITS880s Setup Wizard
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Data logging with the CITS880s Controlled Impedance Test System
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Si8000m / Si9000e – importing measurement impedance from CITS
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Si8000m / Si9000e Field Solver – differential pair crosstalk
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Si8000m – how to compare measured with modeled impedance
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Removing DC trace resistance errors from characteristic impedance measurements
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Si9000e – compare modelled insertion loss with VNA measurement
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Using Speedstack Virtual Material
and Material Library modes |

Downloading Polar Speedstack
online material libraries
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Aligning flex and rigid materials in the Speedstack Navigator
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Using CGen PCB Coupon Generator with mixed layer types
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Si8000m / Si9000e
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Coming soon....
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Spotting and solving alias effects in s-parameters
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Si8000m – getting started with controlled impedance modelling
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Si8000m / Si9000e – getting started with sensitivity analysis
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Si8000m – sensitivity analysis – exploring the process window
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Si8000m / Si9000e Monte Carlo impedance simulation
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Si9000e Field Solver capacitance options
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Si8000m / Si9000e Field Solver – differential pair crosstalk
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Si9000e – compare modelled insertion loss with VNA measurement
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Si9000e graphing, roughness goal seek, sensitivity analysis projects, trace resistance vs temperature
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Speedstack PCB
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Speedstack PCB stackup design and documentation
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Working with Polar Speedstack
library material partners
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Downloading Polar Speedstack
online material libraries
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IPC2581 import/export
Using on-premise material libraries
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Back drilling PCBs for
signal integrity
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Adding IPC class
documentation in Speedstack
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Speedstack – Import/export options and Net classes
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Speedstack documents
shield materials
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Speedstack PCB Filtering Options
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Speedstack Si
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Speedstack Si 2018 Intro - plus Cannonball-Huray enhancement
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Fine tuning PCB stackups
with Si Projects
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Speedstack Si – loss modelling and new via fill types
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Speedstack-Si9000e insertion loss – roughness modelling
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Speedstack Flex
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Design and document flex-rigid stackups with Speedstack Flex
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Selecting multiple materials in
Speedstack Flex
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Documenting a flex-rigid stack with diagonal symmetry
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Aligning flex and rigid materials in the Speedstack Navigator
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Speedstack HDI
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Documenting sequential lamination
in Speedstack HDI
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Adding coated and uncoated microstrips in Speedstack HDI
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Adding unlimited drills with
Speedstack HDI
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